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Conference Program
Schedule at a glance, Program Booklet
Registration/Information Hours
ETS/Workshops Registration desk at Foyer
Monday 22 May 12:00-18:30
Tuesday 23 May 08:00-19:30
Wednesday 24 May 08:00-15:00
Thursday 25 May 08:00-16:00
Workshops Only Registration desk at Foyer
Thursday 25 May 16:00-20:00
Friday 26 May 08:00-16:30
MONDAY, MAY 22, 2017
| 14:00 – 16:00 TSS@ETS TUTORIAL 1 - PART 1 |
Moderator: Lorena ANGHEL, Université Grenoble Alpes, CNRS, TIMA – France
- Machine Learning Techniques for System Level Test and Diagnosis
Krishnendu CHAKRABARTY, Duke University – USA
| 14:00 – 16:00 TSS@ETS TUTORIAL 2 - PART 1 |
Moderator: Hans-Joachim WUNDERLICH, University of Stuttgart – Germany
- Self-Awareness and Resilience Against Faults, Bugs and Attacks
Axel JANTSCH, Christian KRIEG, Vienna University of Technology – Austria
| 16:00-16:30 Coffee Break |
| 16:30 – 18:30 TSS@ETS TUTORIAL 1 - PART 2 |
Moderator: Lorena ANGHEL, Université Grenoble Alpes, CNRS, TIMA – France
- Machine Learning Techniques for System Level Test and Diagnosis
Krishnendu CHAKRABARTY, Duke University – USA
| 16:30 – 18:30 TSS@ETS TUTORIAL 2 - PART 2 |
Moderator: Hans-Joachim WUNDERLICH, University of Stuttgart – Germany
- Self-Awareness and Resilience Against Faults, Bugs and Attacks
Axel JANTSCH, Christian KRIEG, Vienna University of Technology – Austria
| 18:30 – 19:00 Break |
| 19:00 – 20:30 Welcome reception |
*The TSS@ETS Tutorials of Monday afternoon are accessible to all ETS attendees with a full registration. The complete TSS program can be found here.
TUESDAY, MAY 23, 2017
| 8:30 – 9:00 OPENING SESSION |
- Welcome Message
Maria K. MICHAEL, University of Cyprus, KIOS Research and Innovation Center of Excellence – Cyprus, ETS'17 General Chair
- Welcome Message
Constantinos CHRISTOFIDES, University of Cyprus– Cyprus, Rector of the University of Cyprus
- Program Introduction
Haralampos-G. STRATIGOPOULOS, Sorbonne Univ., UPMC Univ. Paris 6, CNRS, LIP6 – France, ETS'17 Program Chair
- Symposium Information
Stelios NEOPHYTOU, University of Nicosia – Cyprus, ETS’17 Local Arrangements Chair
- ETS’16 Best Paper Award
Bernd BECKER*, Adit SINGH╪, *University of Freiburg – Germany, ╪Auburn University – USA, ETS’16 Award Chairs
- Test Technology Technical Council (TTTC) Awards
Yervant ZORIAN, Synopsys – USA, TTTC President of Board
| 9:00 – 10:00 KEYNOTE TALK 1 |
Moderator: Krishnendu CHAKRABARTY, Duke University – USA
- Smart Medical Devices for the Discovery and Treatment of Neurodegenerative Diseases
Mohamed SAWAN, Polytechnique Montréal – Canada
| 10:00 – 11:00 Coffee break |
| 10:00 – 11:00 TABLE-TOP DEMOS |
Moderator: Theocharis THEOCHARIDES, University of Cyprus, KIOS Research and Innovation Center of Excellence – Cyprus
- Silicon Debug, Characterization and Diagnosis Using Benchtop System
Wu YANG, Geir EIDE, Givargis DANIALY, Mentor Graphics – USA
- The SEcubeTM Open Source Platform: Demo & Academy Program
Giuseppe AIRO FARULLA*, Paolo PRINETTO*, Antonio VARRIALE╪, *Politecnico di Torino – Italy, ╪Blu5 Labs Ltd. – Malta
- Qubit Test Synthesis for the Black Box Functionality
Vladimir HAHANOV*, Eugenia LITVINOVA*, Igor IEMELIANOV*, Svetlana CHUMACHENKO*, Hanna KHAKHANOVA*, Wajeb GHARIBI╪, *Kharkov National University of Radioelectronics – Ukraine, ╪Jazan University – Saudi Arabia
- Quality and Reliability Test and Measurement Solutions
Hans MANHAEVE, Ridgetop Europe – Belgium
- CloudTesting Services for on Demand Silicon Validation and Verification
Stefan DOELLINGER, Advantest – Germany
- Solving Congestion & Coverage Challenges In Next Generation Designs – Modus 2D Elastic Compression
Vladimir ZIVKOVIC, Cadence – United Kingdom
| 10:00 – 11:00 POSTER SESSION 1 |
Moderator: Stelios NEOPHYTOU, University of Nicosia – Cyprus
- Detection of Resistive Open and Short Defects in FDSOI Under Delay-based Test: Optimal VDD and Body Biasing Conditions
Amit KAREL*, Florence AZAIS*, Mariane COMTE*, Jean-Marc GALLIERE*, Michel RENOVELL*, Keshav SINGH╪, *University of Montpellier II, CNRS, LIRMM – France, ╪City University of Hong Kong – Hong Kong
- Mitigating Read & Write Errors in STT-MRAM Memories under DVS
Elena Ioana VATAJELU*, Rosa RODRIGUEZ-MONTANES╪, Michel RENOVELL#, Joan FIGUERAS╪, *Université Grenoble Alpes, CNRS, TIMA – France, ╪Universitat Politècnica de Catalunya – Spain, #University of Montpellier II, CNRS, LIRMM – France
- Extension of Power Supply Impedance Emulation Method on ATE for Multiple Power Domain
Naoki TERAO*, Toru NAKURA*, Masahiro ISHIDA╪, Rimon IKENO*, Takashi KUSAKA╪, Tetsuya IIZUKA*, Kunihiro ASADA*, *University of Tokyo – Japan, ╪Advantest – Japan
- Automated Area and Coverage Optimization of Minimal Latency Checkers
Siavoosh PAYANDEH AZAD, Behrad NIAZMAND, Apneet KAUR SANDHU, Jaan RAIK, Gert JERVAN, Thomas HOLLSTEIN, Tallinn University of Technology – Estonia
- A Homogeneous Framework for AMS Languages Instrumentation, Abstraction and Simulation
Enrico FRACCAROLI, Luca PICCOLBONI, Franco FUMMI, University of Verona – Italy
- Integrated Circuits’ Characterization for Non-normal Data in Semiconductor Quality Analysis
Ingrid KOVACS*, Andi BUZO╪, Georg PELZ╪, Marina TOPA*, *Technical University of Cluj-Napoca – Romania, ╪Infineon Technologies – Germany
| 11:00 – 12:30 SESSION 1A: Analog, Mixed-Signal, RF, and MEMS 1 |
Moderators: Alkis HATZOPOULOS, Aristotle Univ. of Thessaloniki – Greece
Gildas LEGER, Instituto de Microelectrónica de Sevilla – Spain
- Design of a Sinusoidal Signal Generator with Calibrated Harmonic Cancellation for Mixed-signal BIST in a 28 nm FDSOI Technology
Hani MALLOUG*, Manuel BARRAGAN*, Salvador MIR*, Laurent BASTERES╪, Herve LE GALL╪, *Université Grenoble Alpes, CNRS, TIMA – France, ╪STMicroelectronics – France
- Automatic Testing of Analog ICs for Latent Defects using Topology Modification
Nektar XAMA*, Anthony COYETTE*, Baris ESEN*, Wim DOBBELAERE╪, Ronny VANHOOREN╪, Georges GIELEN*, *KU Leuven – Belgium, ╪ON Semiconductor – Belgium
- Contact-less Near-Field Measurement of RF Phased Array Mismatches
Maryam SHAFIEE, Sule OZEV, Arizona State University – USA
| 11:00 – 12:30 SESSION 1B: ETS2 1 |
Moderators: René SEGERS, ReSeCo – The Netherlands
Bernd BECKER, University of Freiburg – Germany
On Launching an Automotive Product with an Immediate Guaranteed High Quality and Yield
- Designing for Automotive Quality: Practical DFM and DFT Considerations
Thomas HERMANN, GLOBALFOUNDRIES – Germany
- First Time Right Test Set-Up: Key for a Perfect Automotive Launch
Robert VAN RIJSINGE, NXP – The Netherlands
- Experience and Expectations of Automotive Suppliers for Smooth Launch
Viktor MUELLER, Continental – Germany
| 11:00 – 12:30 SESSION 1C: Vendor Session 1 |
Moderators: Ashraf SALEM, Mentor Graphics – Egypt
Paul-Henri PUGLIESI-CONTI, NXP – France
- Faster and Fewer Patterns with Breakthrough ATPG to the Rescue
Rohit KAPUR, Synopsys – USA
- The DFT Challenges and Solutions for the ARM® MaliTM-Mimir GPU
Teresa MCLAURIN*, Prashant KULKARNI╪, *ARM – USA, ╪ARM – United Kingdom
- Full Throttle on Automotive Test
Martin KEIM, Stephen PATERAS, Becki WATT, Mentor Graphics – USA
| 12:30 – 14:00 Lunch break |
| 14:00 – 15:30 SESSION 2A: Special Session 1 |
Moderator: Shreyas SEN, Purdue University – USA
Design and Test Needs for Adaptive, Self-Learning and Cognitive Systems
- Energy-efficient Cognitive Computing
Kaushik ROY, Purdue University – USA
- Design and Test Needs for Adaptive IoT Sensor Nodes
Shreyas SEN*, Arijit RAYCHOWDHURY╪, *Purdue University – USA, ╪Georgia Institute of Technology – USA
- Self-Learning Systems: Opportunities and Challenges
Abhijit CHATTERJEE, Georgia Institute of Technology – USA
| 14:00 – 15:30 SESSION 2B: ETS2 2 |
Moderators: René SEGERS, ReSeCo – The Netherlands
Bernd BECKER, University of Freiburg – Germany
How to Get the Required Quality and Reliability at Reasonable (Test) Costs?
- Limitation of Scan Diagnosis Leading to New Tools Required for Debugging Scan Problems
Ralf ARNOLD, Infineon – Germany
- On Emerging Packaging Defects Impacting Reliability and Test Coverage
Davide APPELLO, STMicroelectronics – Italy
- How do we Manage the Profusion of New Tests Being Generated to Improve Quality?
Peter MAXWELL, ON Semiconductor – USA
| 14:00 – 15:30 SESSION 2C: Vendor Session 2 |
Moderators: Juergen SCHLOEFFEL, Mentor Graphics – Germany
Michele PORTOLAN, Université Grenoble Alpes, CNRS, TIMA – France
- Functional Safety Support for IP - or What Exactly is an SEooC?
Pete HARROD, ARM – United Kingdom
- DFT Methodologies and IoT Trends
Kan THAPAR*, Becki WATT╪, *Mentor Graphics – United Kingdom, ╪Mentor Graphics – USA
- Reliability - A Nanometer Nightmare?
Hans MANHAEVE, Ridgetop Europe – Belgium
| 15:30 – 16:00 Coffee break |
| 16:00 – 17:30 SESSION 3A: Self-learning, Adaptation, Fault Tolerance, Approximate Computing |
Moderators: Chrysostomos NICOPOULOS, University of Cyprus, Cyprus
Michel RENOVELL, University of Montpellier II, CNRS, LIRMM – France
- Exploiting STT-MRAM for Approximate Computing
Nour SAYED, Fabian OBORIL, Azadeh SHIRVANIAN, Rajendra BISHNOI, Mehdi TAHOORI, Karlsruhe Institute of Technology – Germany
- Real-Time Self-Learning For Control Law Adaptation In Nonlinear Systems Using Encoded Check State
Suvadeep BANERJEE, Abhijit CHATTERJEE, Georgia Institute of Technology – USA
- Rout3D: A Lightweight Adaptive Routing Algorithm for Tolerating Faulty Vertical Links in 3D-NoCs
Amir CHARIF, Zergainoh NACER-EDDINE, Alexandre COELHO, Michael NICOLAIDIS, Université Grenoble Alpes, CNRS, TIMA – France
| 16:00 – 17:30 SESSION 3B: ETS2 3 |
Moderators: René SEGERS, ReSeCo – The Netherlands
Bernd BECKER, University of Freiburg – Germany
How Does the AMS Area Cope with the High Quality Requirements?
- Testing of Mixed Signal Automotive Circuits: Do We Guarantee the Spec or Do We Catch Defects?
Wim DOBBELAERE, ON Semiconductor – Belgium
- Who Solves the Mixed-Signal DfT Challenges?
Hans-Martin VON STAUDT, Dialog Semiconductor – Germany
- A Publicly-Accessible Set of AMS Benchmark Circuits
Stephen SUNTER, Mentor Graphics – Canada
| 16:00 – 17:30 SESSION 3C: Vendor Session 3 |
Moderators: Stefano DI CARLO, Politecnico di Torino – Italy
Erik LARSSON, Lund University – Sweden
- Dependability & Test for Safety Critical Applications
Vladimir ZIVKOVIC, Cadence – United Kingdom
- Bringing Embedded Instruments from Laboratory to Production Test
Artur JUTMAN, Sergei ODINTSOV, Sergei DEVADZE, Igor ALEKSEJEV, Testonica Lab OÜ – Estonia
- An End-to-end Test & Repair Solution
Yervant ZORIAN*, Gurgen HARUTYUNYAN╪, *Synopsys – USA, ╪Synopsys – Armenia
| 17:30 – 18:00 Break |
| 18:00 – 19:30 SESSION 4A: Panel 1 |
Moderator: Stephen SUNTER, Mentor Graphics – Canada
- What are the Most Significant Defects that we are not Modeling or Targeting Adequately?
Panelists:
Davide APPELLO, STMicroelectronics – Italy
John CARULLI, GLOBALFOUNDRIES – USA
Wim DOBBELAERE, ON Semiconductor – Belgium
Adit SINGH, Auburn University – USA
Vladimir ZIVKOVIC, Cadence – United Kingdom
| 18:00 – 19:30 SESSION 4B: Panel 2 |
Moderator: Matteo SONZA REORDA, Politecnico di Torino – Italy
- In-field Self-test for Automotive ICs: which Solutions are Going to Prevail and why?
Panelists:
Teresa MCLAURIN, ARM – USA
Martin KEIM, Mentor Graphics – USA
Ernesto SANCHEZ, Politechnico di Torino - Italy
Yervant ZORIAN, Synopsys -USA
WEDNESDAY, MAY 24, 2017
| 8:30 – 9:30 KEYNOTE TALK 2 |
Moderator: Jochen RIVOIR, Advantest – Germany
- The Future Trends and Contributions of Test in the SOC Market
Hans-Juergen WAGNER, Advantest – Germany
| 9:30 – 10:30 Coffee break |
| 9:30 – 10:30 TABLE-TOP DEMOS |
Moderator: Theocharis THEOCHARIDES, University of Cyprus, KIOS Research and Innovation Center of Excellence – Cyprus
For the complete list of Table-Top Demos, see program on Tuesday, May 23, 2017, 10:00-11:00.
| 9:30 – 10:30 POSTER SESSION 2 |
Moderator: Stelios NEOPHYTOU, University of Nicosia – Cyprus
- ISO26262-Compliant Soft Error Mitigation in Memory Banks
Jan SCHAT, NXP – Germany
- Periodic Bias-Temperature Instability Monitoring in SRAM Cells
Yiorgos TSIATOUHAS, University of Ioannina – Greece
- Mixed-Signal BIST Computation Offloading Using IEEE 1687
Michele PORTOLAN, Manuel BARRAGAN, Rshdee ALHAKIM, Salvador MIR, Université Grenoble Alpes, CNRS, TIMA – France
- Impact of the Switching Activity on the Aging of Delay PUFs
Naghmeh KARIMI*, Jean-Luc DANGER╪, Mariem SLIMANI╪, Sylvain GUILLEY╪, *University of Maryland Baltimore County – USA, ╪Télécom ParisTech, Université Paris-Saclay – France
- Derivation of the Reliability Metric for Digital Circuits
Mohamed ABUFALGHA, Alex BYSTROV, Newcastle University – United Kingdom
- A Very Low Cost and Highly Parallel DfT Method for Analog and Mixed-Signal Circuits
Baris ESEN*, Anthony COYETTE*, Nektar XAMA*, Wim DOBBELAERE╪, Ronny VANHOOREN╪, Georges GIELEN*, *KU Leuven – Belgium, ╪ON Semiconductor – Belgium
| 10:30 – 11:30 SESSION 5A: Digital Test |
Moderators: Grzegorz MRUGALSKI, Mentor Graphics – Poland
Stephan EGGERSGLUSS, University of Bremen – Germany
- Probabilistic Sensitization Analysis for Variation-Aware Path Delay Fault Test Evaluation
Marcus WAGNER, Hans-Joachim WUNDERLICH, University of Stuttgart – Germany
- Bridge Over Troubled Waters: Critical Area Based Pattern Generation
Peter MAXWELL*, Friedrich HAPKE╪, Maija RYYNÄNEN╪, Peter WESELOH╪, *ON Semiconductor – USA, ╪Mentor Graphics – Germany
| 10:30 – 11:30 SESSION 5B: Memories 1 |
Moderators: Elena Ioana VATAJELU, Université Grenoble Alpes, CNRS, TIMA – France
Yiorgos TSIATOUHAS, University of Ioannina – Greece
- Aging-Aware Coding Scheme for Memory Arrays
Mohammad Saber GOLANBARI, Nour SAYED, Mojtaba EBRAHIMI, Mohammad Hadi MOSHREFPOUR ESFAHANY, Saman KIAMEHR, Mehdi TAHOORI, Karlsruhe Institute of Technology – Germany
- ROM Fault Diagnosis for O(n^2) Test Algorithms
Artur POGIEL*, Janusz RAJSKI╪, Jerzy TYSZER╪, *Mentor Graphics – Poland, ╪Mentor Graphics - USA, ╪Poznan University of Technology – Poland
| 10:30 – 11:30 SESSION 5C: Embedded Tutorial 1 |
Moderator: Alex ORAILOGLU, University California San Diego – USA
- Counteracting Malicious Faults in Cryptographic Circuits
Ilia POLIAN*, Francesco REGAZZONI╪, *University of Passau – Germany, ╪ALaRI Institute, University of Lugano – Switzerland
| 10:30 – 12:30 TTTC’s E. J. McCluskey Doctoral Thesis Award – ETS Semi-Finals |
| 11:30 – 12:30 SESSION 6A: Diagnosis and Failure Analysis |
Moderator: Alberto BOSIO, Univ. of Montpellier II, CNRS, LIRMM – France
Michiko INOUE, Nara Institute of Science and Technology – Japan
- Multiple-Defect Diagnosis for Logic Characterization Vehicles
Benjamin NIEWENHUIS, Soumya MITTAL, Ronald BLANTON, Carnegie Mellon University – USA
- Data-driven Fault Diagnosis with Missing Syndromes Imputation for Functional Test through Conditional Specification
Tong GUAN*, Zhaobo ZHANG╪, Wen DONG*, Chunming QIAO*, Xinli GU╪, *State University of New York at Buffalo – USA, ╪Huawei Technologies – USA
| 11:30 – 12:30 SESSION 6B: Memories 2 |
Moderators: Liviu MICLEA, Technical University of Cluj-Napoca – Romania
Sybille HELLEBRAND, University of Paderborn – Germany
- Refresh Frequency Reduction of Data Stored in SSDs Based on A-timer and Timestamps
Marcelino SEIF*, Emna FARJALLAH*, Franck BADETS*, Christophe LAYER*, Emna CHABCHOUB*, Jean-marc ARMANI*, Francis JOFFRE*, Costin ANGHEL╪, Luigi DILILLO#, Valentin GHERMAN*, *CEA LIST – France, ╪Institut Supérieur d’Electronique de Paris – France, #University of Montpellier II, CNRS, LIRMM – France
- Online Profiling for Cluster-Specific Variable Rate Refreshing in High-Density DRAM Systems
Rasool SHARIFI, Zainalabedin NAVABI, University of Tehran – Islamic Republic of Iran
| 11:30 – 12:30 SESSION 6C: Embedded Tutorial 2 |
Moderator: Giorgio DI NATALE, University of Montpellier II, CNRS, LIRMM
- Security and Trust in the Analog/Mixed-Signal/RF Domain: A Survey and a Perspective
Yiorgos MAKRIS, UT Dallas – USA
| 12:30 – 14:00 Lunch break |
| 14:00 – 15:00 SESSION 7A: Analog, Mixed-Signal, RF, and MEMS 2 |
Moderators: Marie-Minerve LOUËRAT, Sorbonne Univ., UPMC Univ. Paris 6, CNRS, LIP6 – France
Hans KERKHOFF, University of Twente – The Netherlands
- A Phase Locking Test Solution for MEMS Devices
Tareq SUPON, Rashid RASHIDZADEH, University of Windsor – Canada
- Coverage-driven Mixed-signal Verification of Smart Power ICs in a UVM Environment
Sebastian SIMON*, Deeksha BHAT*, Alexander RATH*, Jérôme KIRSCHER*, Linus MAURER╪, *Infineon Technologies AG – Germany, ╪Bundeswehr University Munich – Germany
| 14:00 – 15:00 SESSION 7B: Embedded Tutorial 3 |
Moderator: Paolo BERNARDI, Politecnico di Torino – Italy
- Volume Diagnosis Data Mining
Wu-Tung CHENG*, Yue TIAN╪, Sudhakar M. REDDY╪, *Mentor Graphics – USA, ╪University of Iowa – USA
| 14:00 – 15:00 SESSION 7C: Embedded Tutorial 4 |
Moderator: David KEEZER, Georgia Institute of Technology – USA
- Challenges and Emerging Solutions in Testing Embedded IO interfaces in 2.5D and 3D Systems
Salem ABDENNADHER, Intel – USA
| 15:00 – 15:30 Break |
| 15:30 – 22:30 Social event |
THURSDAY, MAY 25, 2017
| 9:00 – 10:00 KEYNOTE TALK 3 |
Moderator: Rob AITKEN, ARM – USA
- To a Trillion and Beyond, the Future of the Internet of Things
Krisztián FLAUTNER, ARM – USA
| 10:00 – 11:00 Coffee break |
| 10:00 – 11:00 TABLE-TOP DEMOS |
Moderator: Theocharis THEOCHARIDES, University of Cyprus, KIOS Research and Innovation Center of Excellence – Cyprus
For the complete list of Table-Top Demos, see program on Tuesday, May 23, 2017, 10:00-11:00.
| 10:00 – 11:00 POSTER SESSION 3 |
Moderator: Stelios NEOPHYTOU, University of Nicosia – Cyprus
- Low Power Probabilistic Online Monitoring of Systematic Erroneous Behaviour
Mauricio GUTIERREZ*, Vasileios TENENTES*, Daniele ROSSI╪, Tom KAZMIERSKI*, *University of Southampton – United Kingdom, ╪University of Westminster – United Kingdom
- SIC Pair Generation in Optimal Time using Rotatable Counters
Ioannis VOYIATZIS, TEI of Athens – Greece
- An Efficient Test Technique to Prevent Scan-Based Side-Channel Attacks
Satyadev AHLAWAT, Darshit VAGHANI, Virendra SINGH, Indian Institute of Technology Bombay – India
- Application-Aware Lifetime Estimation of Power Devices
Ciprian POP*╪, Corneliu BURILEANU*, Andi BUZO╪, Georg PELZ╪, *University Politehnica of Bucharest – Romania, ╪Infineon Technologies – Germany
- Improving the Dependability of AMR Sensors used in Automotive Applications
Andreina ZAMBRANO, Hans KERKHOFF, University of Twente – The Netherlands
- Extended Binary Nonlinear Codes and Their Application in Testing and Compression
Ondrej NOVAK, TU of Liberec – Czech Republic
- A Built-In Self-Test Scheme for Classifying Refresh Periods of DRAMs
Chia-Ming CHANG, Yong-Xiao CHEN, Jin-Fu LI, National Central University –Taiwan
| 11:00 – 12:30 SESSION 8A: Security |
Moderators: Michael MANIATAKOS, NYU Abu Dhabi – United Arab Emirates
Ilia POLIAN, University of Passau – Germany
- Detecting Hardware Trojans Without A Golden IC Through Clock-Tree Defined Circuit Partitions
Fakir HOSSAIN*, Tomokazu YONEDA*, Michiko INOUE*, Alex ORAILOGLU╪, *Nara Institute of Science and Technology – Japan, ╪UC San Diego – USA
- Specification and Verification of Security in Reconfigurable Scan Networks
Michael KOCHTE*, Matthias SAUER╪, Laura RODRIGUEZ GOMEZ*, Pascal RAIOLA╪, Bernd BECKER╪, Hans-Joachim WUNDERLICH*, *University of Stuttgart – Germany, ╪University of Freiburg – Germany
- Scan Chain Encryption for the Test, Diagnosis and Debug of Secure Circuits
Mathieu DA SILVA*, Marie-Lise FLOTTES*, Giorgio DI NATALE*, Bruno ROUZEYRE*, Marco RESTIFO╪, Paolo PRINETTO╪, *University of Montpellier II, CNRS, LIRMM – France, ╪Politecnico di Torino – Italy
| 11:00 – 12:30 SESSION 8B: Special Session 2 |
Moderator: Hans MANHAEVE, Ridgetop Europe – Belgium
Testing for Automotive: What Are the Needs and What Are the Solutions?
- ISO 26262 Fault Detection and Testing, What’s Required?
Mathieu BLAZY-WINNING, NXP – France
- The Challenges of Test for Automotive Applications - An IP Provider’s Perspective
Pete HARROD, ARM – United Kingdom
- Automotive Expectation for Semiconductor Testability
Viktor MUELLER, Continental – Germany
- Functional Safety Requirements and Solutions for Automotive SoCs
Gurgen HARUTYUNYAN, Synopsys - Armenia
| 11:00 – 12:30 SESSION 8C: Special Session 3 |
Moderator: Said HAMDIOUI, TU Delft - The Netherlands
Big Data for Test Engineering: Opportunities and Challenges
- Big Data Yield Learning Aspects
Thomas HERRMANN, GLOBALFOUNDRIES – Germany
- Using Big Data to Enable Part-level Prediction in the Supply Chain
Stéphane IUNG, Qualtera – France
- Big Data for Test Engineering
Keith ARNOLD, PDF Solutions – USA
| 12:30 – 14:00 Lunch break |
| 14:00 – 15:30 SESSION 9: Industry Wish List |
Moderators: Peter MAXWELL, ON Semiconductor – USA
Sule OZEV, Arizona State University – USA
Speakers:
John CARULLI, GLOBALFOUNDRIES – USA
Xinli GU, Huawei Technologies – USA
Peter WOHL, Synopsys – USA
Hans MANHAEVE, Ridgetop Europe – Belgium
Kan THAPAR, Mentor Graphics – United Kingdom
Yervant ZORIAN, Synopsys – USA
Keith ARNOLD, PDF Solutions – USA
| 15:30 – 16:00 CLOSING SESSION |
- Closing Message
Maria K. MICHAEL, University of Cyprus, KIOS Research and Innovation Center of Excellence – Cyprus
- ETS’18 Introduction
Rolf DRECHSLER, Stephan EGGERSGLUSS, University of Bremen – Germany
